suzukiplan/z80
Single header Z80 emulator for C++ (C++11 or later)
📋 Changes
- Abolish FP functions _(NOTE: Destructive change)_
- Eliminate `FP` methods that register callback functions as explicit function pointers
- In principle, `std::function` should be used
- If you defined `-DZ80_NO_FUNCTIONAL`, `std::function` should not be used, and use function pointer explicity.
- _This is a remedy for the unavailability of std::function in the Baremetal environment of the RaspberryPi, etc._
- _Alternatively, it may be desirable to define this in an environment with severe performance constraints._
- Added compile option `-DZ80_NO_EXCEPTION` to not throw exceptions
- Add `wtc.fetchM` and clock test case for MSX
- + 7 more
📋 Changes
- Add compile flags for performance:
- `-DZ80_DISABLE_DEBUG` ... disable `setDebugMessage` method
- `-DZ80_DISABLE_BREAKPOINT` ... disable `addBreakPoint` and `addBreakOperand` methods
- `-DZ80_DISABLE_NESTCHECK` ... disable `addCallHandler` and `addReturnHandler` methods
- The return value of `consumeClock` was returning the number of clocks consumed, but this was changed to `void` because it was redundant.
- Add the constructor without arguments.
- Add an execute method without expected clocks
- optimize acqauire register-pointer and register procedure
- + 2 more
📋 Changes
- The value of the upper 8 bits of the port number of the immediate I/O operands (`IN A, (n)` and `OUT (n), A`) when executed in 16-bit port mode has been changed from register B to A. (issue: #54 )
📋 Changes
- Corrected a degrade in version 1.9.0 #52
- `INI`, `INIR`, `IND` and `INDR` -> post decrement the B register (revert to 1.8.0)
- `OUTI`, `OTIR`, `OUTD` and `OTDR` -> pre-decrement the B register (keep 1.9.0)
📋 Changes
- Modify the timing of decrementing the B register with the repeat I/O operands (`INI`, `INIR`, `IND`, `INDR`, `OUTI`, `OTIR`, `OUTD` and `OTDR`). _(NOTE: Destructive change)_
- before
- execute IN/OUT
- B = B - 1
- after
- B = B - 1
- execute IN/OUT
- Related Issue: #51
📋 Changes
- Make strict the registers conditions at callback time (NOTE: Destructive change specification)
- see the details: https://github.com/suzukiplan/z80/issues/49
- When a runtime error occurs, such as executing an instruction that not exists, a crash used to occur, but now it throws a `std::runtime_error` exception.
- add new FP methods:
- `addBreakPointFP`
- `addBreakOperandFP`
- `addReturnHandlerFP`
- `addCallHandlerFP`
- + 6 more
A bug that prevented `addBreakOperand` from working as expected has been addressed.
📋 Changes
- Destructive change specification of in/out callback:
- before: 2nd argument is `unsigned char`
- `std::function<unsigned char(void*, unsigned char)> in`
- `std::function<void(void*, unsigned char, unsigned char)> out`
- after: 2nd argument is `unsigned short`
- `std::function<unsigned char(void*, unsigned short)> in`
- `std::function<void(void*, unsigned short, unsigned char)> out`
- Add an argument `returnPortAs16Bits` to the constructor to specify whether the port should receive 16-bit
- + 10 more
📋 Changes
- Use `std::function` ... `constructor, addBreakPoint, addBreakOperand, setDebugMessage, setConsumeClockCallback, addReturnHandler, addCallHandler`
- Support multibyte (with prefix) instructions at addBreakOperand
- Change specification of addBreakOperand callback
- befofe: `z80.addBreakOperand(operandNumber, [](void* arg) { ... }`
- after: `z80.addBreakOperand(operandNumber, [](void* arg, unsigned char* opcode, int opcodeLength) { ... }`
- Destructive change specification of removeBreakPoint:
- before: specify function pointer for remove
- after: specify address number for remove
- + 13 more
📋 Changes
- Implemented several undocumented instructions of ED instruction set.
- bugfix: Corrected opcode `ED70` behavior
- `IN F, (C)` -> `IN (C)`
- bugfix: Corrected opcode `ED71` behavior
- `OUT (C), F` -> `OUT (C),0`
📋 Changes
- Remove LR35902 features
- Add zexall to the standard test case
- Fixed refresh register update timing
- Add wait prefeatch / preread / prewrite feature (optional)
- Change CI Tool: TravisCI -> CircleCI
- Add CI test mode
📋 Changes
- Pull Request: #30
- implemented the all of undocumented instructions
- add test case: [Z80 Instruction Exerciser](https://mdfs.net/Software/Z80/Exerciser/)
- passed `zexdoc` and `zexall`
📋 Changes
- implemented undocumented features: https://github.com/suzukiplan/z80/pull/27
📋 Changes
- bugfix: memory leak when using `addBreakOperand`, `addBreakPoint`, `addCallHandler` or `addReturnHandler`, and not remove them
📋 Changes
- Make the `readByte` and `writeByte` methods public instead of private for allow external programs to read and write memory via the CPU (synchronously).
- Add the ability to handle CALL/RET
📋 Changes
- bugfix: interrupt mode 2 (IM2) did not work as expected.
📋 Changes
- bugfix: incorrect log POP 16bit register
When the CPI/CPD/CPIR/CPDR instructions are executed, the specification is to set the P/V flag if the result of decrementing BC is not zero, and reset it if it is zero, but the situation is reversed.
Fixed a bug that jumps to an invalid address when the relative jump destination address e of JR and DJNZ are a boundary case.
📋 Changes
- bugfix: NMI will not generate after 2nd times or later (NMI flag did not clear by RETN)
support LR35902 (GBZ80) compatible mode
📋 Changes
- bugfix: R register not increment after executed opcode.
- bugfix: R will over 127 if execute NMI 128 times
📋 Changes
- enhancement: implement undocumented instructions:
- `INC IXH/IXL/IYH/IYL`
- `DEC IXH/IXL/IYH/IYL`
- `LD IXH/IXL/IYH/IYL, nn`
- `LD A/B/C/D/E, IXH/IXL/IYH/IYL`
- `LD IXH/IXL/IYH/IYL, A/B/C/D/E/IXH/IXL/IYH/IYL`
- `ADD/ADC/SUB/SBC/AND/XOR/OR/CP A, IXH/IXL/IYH/IYL`
- `RLC (IX+nn) with LD B/C/D/E/H/L/F/A, (IX+nn)`
- + 8 more
📋 Changes
- bugfix: incorrect return address when calling RST instruction directly from code
First stable version
📦 Version 0.9 (Jul 16, 2020 JST)
- bugfix: invalid clock cycle in repeart operands
- bugfix: invalid register will specified in `OUT (C), R` & `IN R, (C)`
📦 Version 0.8 (Jul 16, 2020 JST)
- Fixed a bug that IRQ/NMI request flag does not clear when masked
📦 Version 0.7 (Jul 16, 2020 JST)
- Fixed a bug that DJNZ command does not work properly:
- 0.6 or less: An instruction that decrements the B register and makes a relative jump if it `is 0`.
- 0.7 or later: An instruction that decrements the B register and makes a relative jump if it `is not 0`.
📦 Version 0.6 (Jul 14, 2020 JST)
- implemented & bugfix of interrupt features
📦 Version 0.5 (Jul 12, 2020 JST)
- implemented compatible(?) instructions:
- `OUT (C), r`
📦 Version 0.4 (Jul 12, 2020 JST)
- added an explicit execution break function (requestBreak)
- corrected disassemble log of following:
- `AND R, (IX+d)`
- `AND R, (IY+d)`
- `OR R, (RP)`
- `OR R, (IX+d)`
- `OR R, (IY+d)`
- `XOR R, (RP)`
- + 2 more
📋 Changes
- support multiple break operands (Destructive change)
- remove function: `setBreakOperand`
- add functions: `addBreakOperand` , `removeBreakOperand` , `removeAllBreakOperands`
- bugfix: do not increment the program counter while halting
📋 Changes
- support multiple break points (Destructive change)
- remove function: `setBreakPoint`
- add functions: `addBreakPoint` , `removeBreakPoint` , `removeAllBreakPoints`
📋 Changes
- implemented the all of documented instructions
